Depthwise convolution based pyramid ResNet model for accurate detection of COVID-19 from chest X-Ray images

ABSTRACT

The global pandemic of coronavirus disease 2019 (COVID-19) causes severe respiratory problems in humans. The Chest X-ray (CXR) imaging technique majorly assists in detecting abnormalities in the chest and lung areas caused by COVID-19. Hence, developing an automatic system for CXR-based COVID-19 detection is vital for disease diagnosis. To accomplish this requirement, an enhanced Residual Network (ResNet) model is proposed in this paper for accurate COVID-19 detection. The proposed model combines the Depthwise Separable Convolutional ResNet and Pyramid dilated module(DSC-ResNet-PDM) for deep feature extraction. Employing the DSC layer minimizes the number of parameters to mitigate the overfitting issue. Further, the pyramid dilated module is used for extracting multi-scale features. The extracted features are finally fed into the optimized Medium Gaussian kernel Support Vector Machine classifier (MGKSVM) for COVID-19 detection. The proposed model attained an accuracy of 99.5%, which is comparatively higher than the standard ResNet50 and ResNet101 models.

KEYWORDS:

• COVID-19
• chest X-Ray
• deep learning
• ResNet101
• pyramid dilated module
• multi-scale features
• support vector machine
• multi-class detection

Disclosure statement

No potential conflict of interest was reported by the authors.

Additional information

Notes on contributors

K. G. Satheesh Kumar

K. G. Satheesh Kumar, Research Scholar in SENSE, VIT, Vellore, Tamil Nadu, India. He has done his M.Tech in Network Communication and Security from Dr. MGR Educational and Research Institute Chennai. Since 2001, he has been a faculty in the Department of Electronics and Communication Engineering, Amal Jyothi College of Engineering, Kanjirapally, Kottayam, Kerala, India.

V. Arunachalam

V. Arunachalam received the B.E. degree in Electrical and Electronics Engineering from University of Madras, India, in 1997 and M.E. degree in Power Electronics and Drives from Anna University, Chennai, India, in 2002. Since 2004, he has been a member of faculty in the Department of Micro and Nano Electronics, School of Electronics Engineering, Vellore Institute of Technology University, Vellore, India, where he is currently an Associate professor of the department. His research interests are FPGA based system design, HW/SW partitioning, VLSI DSP and reconfigurable architecture. He is serving as IEEE student branch counselor, VIT University, Vellore.