Particle Swarm Optimization-Based Bandpass Filter Using Switched-Fractional Capacitors

Abstract

A new approach to designing a fractional bandpass filter using switched-fractional capacitors has been reported for the first time. This is achieved using four fractional-capacitors $(F{C}_1,F{C}_2,F{C}_3,\text{ and }F{C}_4)$ with orders α, β, δ, and λ, respectively, where $0<\alpha ,\text{β},\delta ,\lambda \le 1$. The presented work deals with designing a fractional bandpass filter using switched capacitors and switched-fractional capacitors in place of resistors. The stability and the speed of response of the proposed filter have been investigated by computing the filter parameters analytically. Filter parameters such as settling-time ($t_s$), peak-overshoot ($M_p$), and rise-time ($t_r$) improve compared with their integer-order counterpart. Furthermore, detailed comparative studies on different design parameters have also been carried out through simulation studies and experimentations. The particle swarm optimization (PSO) technique is used for getting the optimal values of the orders of the switched-fractional capacitors to improve the response of the proposed filter.

KEYWORDS:

• Fractional-capacitor
• Fractional-order bandpass filter
• Switched-fractional capacitor
• Switching frequency
• Particle swarm optimization
• Quality factor

DISCLOSURE STATEMENT

No potential conflict of interest was reported by the author(s).

Additional information

Notes on contributors

S. Swain

S Swain received his BTech degree in electronics and instrumentation engineering from C V Raman Global University, Bhubaneswar, India, in 2018 and an MTech degree in electronics and instrumentation from College of Engineering and Technology, Bhubaneswar, India, in 2020. He is currently pursuing a PhD at the Department of Electronics and Instrumentation Engineering, Odisha University of Technology and Research, Bhubaneswar, India. His areas of interest are fractional-order analog circuits, signal processing, control systems and artificial intelligence. E-mail: [email protected]

M. C. Tripathy

M C Tripathy received his BTech degree in instrumentation and electronics from the College of Engineering and Technology, Bhubaneswar, India, in 1996 and an ME degree in electronics and telecommunication engineering from IIST, West Bengal, India, in 2001. He also received his PhD at the Department of Electrical Engineering from the Indian Institute of Technology, Kharagpur, in 2015. He is currently working as associate professor with the Department of Electronics and Instrumentation Engineering, Odisha University of Technology and Research, Bhubaneswar, India. His areas of interest are fractional-order analog circuits, analog and digital signal processing. Corresponding author. E-mail: [email protected]

S. Behera

S Behera received his BSc (Engineering) degree in electrical engineering from University College Engineering, Burla (currently VSSUT Burla) in 1988 and MTech degree in machine drives and power electronics from the Indian Institute of Technology, Kharagpur in 1991 and PhD in power electronics from the Indian Institute of Technology, Kanpur in 2003. Presently he is a professor and head of the Department of Electronics and Instrumentation Engineering, Odisha University of Technology and Research, Bhubaneswar, India. His areas of interest are power electronics and machine drives. E-mail: [email protected]