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Research Article

A Quasi-Ballistic Model for Short Channel Monolayer Graphene Field Effect Transistor Including Scattering Effects

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Published online: 22 May 2024
 

Abstract

In this work, the Landauer approach-based short channel model of a graphene field effect transistor has been presented. The quasi-ballistic and ballistic transport mechanism is explained by this approach for nanoscale transistors. The concept of the virtual source is considered to obtain the carrier density in active regions. Here, we apply the Landauer approach for short-channel graphene field effect transistors relating to the parameter in the virtual source model. The mobility of the model has been improved including various scattering effects like impurity scattering, acoustic phonon scattering, and optical phonon scattering. The dynamic resistance model is considered due to asymmetry transport in the electron branch and hole branch. The proposed model has been verified with several experimental works for model validation. The comparisons of the model simulation with several experimental results that have been reported in the literature match well for different short channel lengths of graphene.

Disclosure statement

No potential conflict of interest was reported by the author(s).

Additional information

Notes on contributors

Sudipta Bardhan

Sudipta Bardhan received an MTech degree in VLSI design and microelectronics technology from Jadavpur University, Kolkata, India, in 2009. He received his PhD degree from IIEST, Shibpur, India in 2020. His PhD thesis was on the modelling and simulation of graphene FET for VLSI circuit applications. He is an assistant professor in the department of electronics and communication engineering at Haldia Institute of Technology, Haldia, India. His current research interests include the modelling and simulation of nanoscale devices. Email: [email protected]

Manodipan Sahoo

Manodipan Sahoo (F'22) was born in Haldia, West Bengal, India in 1983. He received an MTech in instrument technology from the Indian Institute of Science, Bangalore in 2006. He received a PhD degree from IIEST, Shibpur, India in 2016. His PhD thesis was on modelling and analysis of carbon nanotube and graphene nanoribbon-based interconnects. He is currently san assistant professor in the department of electronics engineering, Indian Institute of Technology (Indian School of Mines), Dhanbad, India. His research interests include modelling and simulation of nano-interconnects and nano-devices, VLSI circuits and systems, and internet of things. He has published more than 50 articles in archival journals and refereed conference proceedings. He has also published a book entitled Modelling and Simulation of CNT and GNR Interconnects with Lambert Academic Publishers in 2019. He published a book chapter entitled Modelling Interconnects for Future VLSI Circuit Applications with IET Publishers in 2019. He is also associated as a senior member of IEEE, a fellow of IETE, a member of IEI, and a life member of the Instrument Society of India. Corresponding author. Email: [email protected]

Jagannath Samanta

Jagannath Samanta (Fellow IEI, 23) is an associate professor in the department of electronics & communication engineering at the Haldia Institute of Technology, Haldia, West Bengal, India. He received the BTech and MTech degrees in electronics and communication engineering from West Bengal University of Technology, West Bengal, India, in 2005 and 2008, respectively. Dr. Samanta received his gold nedel during her MTech degree. He received his PhD (Tech) degree from the Institute of Radio Physics & Electronics in 2018. His research interests include digital VLSI design and error correcting codes. He has published more than 50 research papers in international journals such as IEEE Transactions, Springer, etc. He has published two books with Lambert Academic Publishers. He is the Editor of “Proceedings ICCDC2021 and ICCDC2023” Lecture Notes in Electrical Engineering, Springer. He is the reviewer of referred journals like IEEE Transactions, Springer, Elsevier, etc. Email: [email protected]

Hafizur Rahaman

Hafizur Rahaman currently is a faculty member of the Indian Institute of Engineering Science and Technology (IIEST), Shibpur, India. His research interests include the design and testing of integrated circuits, nano-biochips, and emerging nanotechnologies including reversible quantum computing. He has published more than 300 research articles in archival journals and refereed conference proceedings. Email: [email protected]

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