ABSTRACT
Multiprocessor system-on-chip (MPSoC) is increasingly used in today’s complicated embedded systems. This paper uses an efficient Hierarchical Interconnection Framework (EHIF) to improve throughput and latency over traditional 3D mesh NoC. The suggested router is hierarchical with one module handling inter-layer communication and intra-layer communication. The EHIF compares well to the traditional 3D mesh in terms of area and power consumption. The EHIF method reduced the execution time without increasing the memory buffer size to optimise time and memory. It achieves a high performance ratio, throughput, low power consumption, latency and delay compared to other methods
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Data availability statement
This article does not cover data research. No data were used to support this study.
Declaration
There are no similar papers under consideration or published in another venue.